1. Field of the Invention
The present invention relates to a semiconductor device which can prevent miss-operation by a simple circuit configuration.
2. Background Art
For the power control of the load of a motor and the like, a semiconductor device such as a bridge circuit or a three-phase AC inverter circuit is used. Such a semiconductor device has two power elements totem-pole-connected between a power source potential and a grounding potential, and a driving circuit to drive them. The midpoint of the two power elements is connected to the load, and controls the load by the ON-OFF controlling of the two power elements (for example, refer to Japanese Patent Application Laid-Open No. 2010-178579 (Patent Literature 1).
FIG. 12 is a circuit diagram showing a conventional semiconductor device. When a power element Q1 is turned ON, dV/dt is applied between the collector and the emitter of a power element Q2. In this case, since a current to charge the parasitic capacity Cres between the gate and the collector of the power element Q2 flows, the gate voltage of the power element Q2 rises (gate float). When the gate voltage of the power element Q2 by this gate float exceeds the threshold voltage, the power element Q2 is faultily turned ON, and a short-circuit current flows.
Therefore, when the power element Q2 is turned OFF, a negative voltage V− is applied to the gate of the power element Q2 using the power source for a negative voltage. Thereby, since the gate voltage of the power element Q2 becomes lower than the emitter voltage (GND), the gate voltage of the power element Q2 is hard to rise to the threshold voltage even if gate float occurs.